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Clock generator / PLL / buffer

Part of Clocks and timing

clk.gen

BOM rule hits · not reviewed — A hit means a BOM line matched this category's rules (ruleset 1.0.1+12960cbec977). It is a lead to read, not a located or reviewed circuit; several lines in one category are not several circuits.

Selection parameter template (suggestion)

What one usually states when choosing a circuit of this kind — not the parameters of any design or module listed here, and never a filter.

ParameterSuggested range or common valuesWhere it comes from
OutputsDecisive1 to 12This category's own
Frequency range (MHz)Decisive0.008 to 1,500 MHzRedefined here
Jitter (ps)Important0.05 to 100 psThis category's own
Output levelImportantLVCMOSLVDSLVPECLHCSLThis category's own

In the parent's template, not in this one: Frequency accuracy, Output type, Operating voltage

Template version 1.0.1+3e52bcb40ed6 (separate from the rules)

Design files with a hit (44)