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scaffold - ATECC认证芯片目标子板

BOM013437 · atecc-auth-bf185a3

What the project is · as the catalogue files it; the circuit functions below are BOM rule hits

Filed under “嵌入式系统” in the ezPLM catalogue. Read the project’s own description (README)

Circuit functions included · BOM rule hits · not reviewed

Secure element / crypto chip / TPM
- U1 ATECC508A · by part number
- U2 ATECC508A · by part number

PCB · seen from the top

Full size

Schematic

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Online view

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4 rows · 5 parts0 of 4 rows placedHover or click a row to mark its parts in the view; click a part in the view to find its row.

Looks up part numbers and makers at ezPLM, DigiKey and Mouser. What it finds are suggestions: check one before you use it.

Designators	Value	Part	Qty
U1	ATECC508ASOIC-8_3.9x4.9mm_P1.27mm	No part number	1
U2	ATECC508AFLIP-SOIC-8_3.9x4.9mm_P1.27mm	No part number	1
LOGO1	DUNGEON_LOGOdonjon-2000	No part number	1
J1, J2	Conn_02x10_Odd_EvenPinSocket_2x10_P2.54mm_Vertical	No part number	2

What you can do

Function

AI assistant

Written by a model from the evidence it cites · not reviewed

Answers use only what was read of this design: its BOM lines, the function hits, the parsed nets around your selection and the part's catalogue record. Every statement links to its evidence.

The AI assistant is not available here: no model is set up for it. The design, its BOM and the viewer work as usual.

Context: the whole design

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Source

Project: scaffold - ATECC认证芯片目标子板
Project category: 嵌入式系统
BOM number: BOM013437
Version: atecc-auth-bf185a3
EDA tool: kicad
Parse status: succeeded
Repository: https://github.com/Ledger-Donjon/scaffold
Commit: bf185a3249c25b27c555d69f9bc76e58fe2611f9
Directory: scaffold-bf185a3249c25b27c555d69f9bc76e58fe2611f9/daughter-boards/atecc
Licence: LGPL-3.0 — as the catalogue declares it, not verified

Notes as written in ezPLM

来源：https://github.com/Ledger-Donjon/scaffold；HeyPCB收录提交：bf185a3249c25b27c555d69f9bc76e58fe2611f9；目录：scaffold-bf185a3249c25b27c555d69f9bc76e58fe2611f9/daughter-boards/atecc；许可：LGPL-3.0，保留COPYING与COPYING.LESSER及Ledger SAS/Julien Juan/Guillaume Levant署名。按原装配位置选择目标器件，不能把两个位置当作两块独立板；本板不含母板FPGA、测量放大器或完整安全测试系统，必须与相应母板及测试程序配套。